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dc.contributor.author | Orfao, Beatriz | |
dc.contributor.author | García Vasallo, Beatriz | |
dc.contributor.author | Moro-Melgar, Diego | |
dc.contributor.author | Zaknoune, M. | |
dc.contributor.author | Gioia, G. Di | |
dc.contributor.author | Samnouni, M. | |
dc.contributor.author | Pérez Santos, María Susana | |
dc.contributor.author | González Sánchez, Tomás | |
dc.contributor.author | Mateos López, Javier | |
dc.date.accessioned | 2021-09-14T08:21:16Z | |
dc.date.available | 2021-09-14T08:21:16Z | |
dc.date.issued | 2021 | |
dc.identifier.uri | http://hdl.handle.net/10366/147145 | |
dc.description.abstract | [EN]Schottky barrier diodes (SBDs) with realistic geometries have been studied by means of a 2-D ensemble Monte Carlo simulator. The non-linearity of the Capacitance-Voltage (C-V) characteristic is the most important parameter for optimizing SBDs as frequency multipliers. In this paper, by changing the values of several technological parameters, we analyze their influence on the edge fringing capacitance in a GaN SBD. We have found that the parameters related with the dielectric used for the passivation and the lateral extension of the epilayer significantly affect the fringing capacitance, thus increasing the value of the total capacitance above the ideal one. | es_ES |
dc.description.sponsorship | Spanish MINECO and FEDER under Project TEC2017-83910-R and Junta de Castilla y León and FEDER under Project SA254P18 | es_ES |
dc.format.mimetype | application/pdf | |
dc.language.iso | eng | es_ES |
dc.publisher | IEEE | es_ES |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Edge effects | es_ES |
dc.subject | Monte Carlo | es_ES |
dc.subject | Schottky barrier diodes | es_ES |
dc.subject | Permitivity | es_ES |
dc.subject | Dielectric | es_ES |
dc.subject | Fringing capacitance | es_ES |
dc.title | Technological Parameters and Edge Fringing Capacitance in GaN Schottky Barrier Diodes: Monte Carlo Simulations | es_ES |
dc.type | info:eu-repo/semantics/article | es_ES |
dc.relation.publishversion | https://doi.org/10.1109/CDE52135.2021.9455727 | es_ES |
dc.subject.unesco | 2203 Electrónica | es_ES |
dc.identifier.doi | 10.1109/CDE52135.2021.9455727 | |
dc.relation.projectID | SA254P18 | es_ES |
dc.relation.projectID | TEC2017-83910-R | es_ES |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es_ES |
dc.journal.title | 2021 13th Spanish Conference on Electron Devices (CDE) | es_ES |
dc.page.initial | 94 | es_ES |
dc.page.final | 97 | es_ES |
dc.type.hasVersion | info:eu-repo/semantics/publishedVersion | es_ES |
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